Digitalization and image compression techniques are core elements supporting multimedia. Image compression becomes very important as information is rapidly digitalized.
An MPEG based video encoder removes image repetition in a temporal direction using motion estimation. Particularly, h.264 can obtain a compression rate higher than that of a conventional MPEG video encoder by using an improved motion estimation method such as quarter pel based motion estimation, motion estimation using a variable block, motion estimation using multiple frame referencing, estimation using weights and Lagrange cost based motion estimation. However, the h.264 has to process a large quantity of computations as compared to the conventional MPEG video encoder because the h.264 uses the improved motion estimation method.
A motion estimation algorithm of the h.264 estimates a motion vector Mp of a current macroblock from a motion vector of a previous macroblock, obtains a cost that considers the quantity of data required to encode a difference between the motion vector Mp and an initially estimated motion vector together with a video error in motion estimation through Lagrange multiplier represented by Equation 1 and estimates a candidate motion vector Mv corresponding to a smallest cost as a final motion vector to improve encoding efficiency.[Equation 1]Cost=SAD+λ×(Mp−Mv)  [6]
A conventional hardware based motion estimation system supporting the aforementioned motion estimation algorithm performs encoding macroblock by macroblock, encodes a single macroblock, and then processes the next macroblock in a raster scan direction.
The conventional hardware based motion estimation system supporting the motion estimation algorithm has to process the quantity of computations multiple times the quantity of computations processed by conventional MPEG-1,2,4 video encoders to encode a single frame, and thus a relatively long encoding time t is required and most of the encoding time t is consumed for operations for motion estimation.
Recently, a system capable of simultaneously processing a large number of computations in parallel has been developed with the development of hardware. Particularly, graphic hardware based on a graphic process unit (GPU) includes many processing units for processing 3D images in a single system.
Accordingly, the present invention improves the operation processing speed of an h.264 encoder by using many processors capable of simultaneously processing a large number of computations in parallel.